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www.azmicrotek.com 1630 s stapley dr, suite 127 +1 - 480- 962- 5881 mesa, az 85204 usa r equest a sample m ay 2012, rev 1.2 d escription the azt71 is a digitally programmed capacitor specifically designed to tune a crystal or saw based oscillator to a desired center frequency. the desired capacitance value for production trimming is set by a serial data stream when placed into a programming mode. the azt71 is designed to be a labor and cost saving device within the oscillator production process. using eeprom technology, the capacitance can be re - tuned as needed during the production process by repeating the programming steps thereby increasing production yield. the azt71 is available in an son8 package (1.5mm x 1.0mm) for very small form factor oscillators. also available in mlp6 and tsot6. b lock d iagram f eatures ? capacitive tuning range of 6.6pf to 37.553pf (see azt70 for different values) ? 0.063pf minimum step size ? re program mable through nonvolatile eeprom storage ? may be placed in parallel for greater capacitance values ? very low supply current ? 2.5v to 3.6v supply voltage a pplications ? fast production tuning of crystal or saw oscillators ? filters requiring capacitive tuning p ackage a vailability ? son8 ? mlp 6 ? tsot6 ? all are green/rohs/pb - free az t71 programmable capacitive tuning ic order number package marking azt71qg 1 son 8 y 2 azt71hg 1 tsot6 y1g 2 AZT71MG 1 mlp 6 y1g 2 1 tap e & reel - add 'r1' at end of order number for 7in (1k parts), 'r2' (2.5k) for 13in 2 see www.azmicrotek.com for date code format www.azmicrotek.com
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 2 r equest a sample m ay 2012, rev 1.2 p in d escription and c onfiguration table 1 - pin description son8 package (1.5mm x 1.0mm) pin name type function 1 x 1 output capacitance 2 nc n/a not connected 3 v ss power negative supply (gnd) 4 v dd power positive supply 5 da input programming data input 6 clk input programming clock input 7 nc n/a not connected 8 pv input programming voltage table 2 - pin description tsot6 package pin name type function 1 x 1 output capacitance 2 v ss power negative supply (gnd) 3 pv input programming voltage 4 clk input programming clock input 5 da input programming data input 6 v dd power positive supply table 3 - pin description 6mlp package (2.0mm x 2.0mm) pin name type function 1 x 1 output capacitance 2 v ss power negative supply (gnd) 3 v dd power positive supply 4 da input programming data input 5 clk input programming clock input 6 pv input programming voltage 1 x 1 v ss v dd da clk pv 2 3 6 5 4 yg1 figure 1 - pin configuration son8 figure 2 - pin configuration tsot6 figure 3 - pin configuration 6mlp 1 x 1 nc v ss v dd da clk nc pv 2 3 4 y 8 7 6 5 1 x 1 v ss v dd da clk pv 2 3 6 5 4 y1
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 3 r equest a sample m ay 2012, rev 1.2 e ng ineering n otes c apacitor s tructure the azt71 capacitance value is composed of four parallel capacitors banks, c f is a fixed capacitor value of 6.6pf and c hi, c mid & c lo are variable capacitors of differing ranges and resolutions as seen in table 4 . capa citors composing c hi , c mid and c lo are set with a binary control word through an 11 - bit shift register described in p rogramming the azt71 . the values of each c hi , c mid and c lo stepping are detailed in the complete n ominal capacitance b inary m apping spreadsheet. c total = c f + c hi + c mid + c lo table 4 - azt7 1 capacitor structure internal capacitor min value (pf) max value (pf) step size (pf) c f 6.6 6.6 n/a c hi 0 19.2 6.4 c mid 0 9.8 1.4 c lo 0 1.953 0.063 total 6.6 37.553 p rogramming the azt7 1 c ontrol w ord the capacitance in the azt71 is controlled by an 11 - bit shift register with the data input bit definitions shown in table 5 . the c ontrol word data is inputted serially on the rising edge of the clk signal with bit0 first and bit10 last. table 5 - azt7 1 control word definition 11- bit control word bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 c hi c mid c lo not used msb lsb msb --- lsb msb --- --- --- lsb the control word mapping is a binary word for each of c hi , c mid and c lo where higher number bits are more significant. figure 4 shows the capacitance value mapping for the azt71. the detailed n ominal capacitance b inary m apping can be located on the azm website.
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 4 r equest a sample m ay 2012, rev 1.2 figure 4 ? azt71 capacitance value mapping azt71 f unctional m odes the azt71 is designed to be used in 2 functional modes, programming and operational. in the p rogramming mode , the azt71 is u sed by the manufacturer to set the capacitance value to control the desired center frequency of the oscillator. the programming mode uses either the shift registers or eeprom (detailed later) and gives the manufacturer access to pins da, clk, and pv which allow the azt71 to be programmed with an accompanying programming board ( figure 5 ). arizona microtek can provide this board ( azpb70 ) along with software that works through all the programming steps/functions described in the next sections. in the o perational mode , the eeprom internal to the azt71 has already been programmed with the desired factory settings. pins da, clk, and pv are to be disconnected, thereby allowing the azt71?s internal pull - downs to place the pins at ground potential. in the operational mode, only 3 pins are necessary for hookup ( fig ure 6 ).
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 5 r equest a sample m ay 2012, rev 1.2 azt71 programming board (prt70) x 1 da clk pv da clk pv v ss v dd resonator out oscillator figure 5 ? azt7 1 in programming mode azt71 x 1 da clk pv v ss v dd resonator out oscillator nc nc nc figure 6 ? azt7 1 in operational mode p rogramming m odes the azt71 has two capacitance setting modes from which bits are set and the matching capacitors are selected. ? reading directly from the shift register o this is useful for testing the capacitance and subsequent oscillator frequency. this mode is active after the last bit is shifted in and when the clk pin is left logic high. for the shift register, capacitors are selected when bits are active high. ? readin g from the value contained in the eeprom o prevents customer adjustment and retains factory programming and is active when the clk pin is at logic low or not connected. for the eeprom, capacitors are selected when bits are active low.
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 6 r equest a sample m ay 2012, rev 1.2 p rogramming from the s h ift r egister to initially determine the capacitance value for the desired center frequency of the oscillator one should set the capacitance of the azt71 directly from the active shift register bits. to accomplish this, the clk pin is left high after the la st control word bit has been shifted in. figure 7 shows the control word 11001100100 has been serially entered into the register. note that bit0 is th e 1 st bit to enter and bit10 is the last. in the azt71, bit0 does not affect the capacitance value but still must be included in the serial bit stream. for the shift register, capacitors are selected when bits are active hig h. t da clk bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 register data active when clk is high bit 0 loaded 1 st figure 7 - shift register programming w riting d ata to the eeprom once the desired capacitance value has been determined, the digital control word can be written or re - written into the eeprom. by storing the control word in the eeprom, the customer is prevented from making adjustments from the factory set programming dat a. this is accomplished within the azt71 with internal pull - downs on the da, pv, and clk pins. the detailed sequence for writing data to the eeprom within the azt71 is described in table 6 . note that with eeprom, capacitors are selected when bits are active low. table 6 ? data writing sequence for eeprom step action 1 determine the desired capacitor control word with the operational power supply voltage and desired oscillator conditions 2 set the v dd supply voltage to +5.0v 3 if eeprom is not already erased, erase eeprom (see e rasing the eeprom ) 4 read the current state of the eeprom bits (see r eading b ack from the eeprom ) 5 compare the desired control word to the stored eeprom control word. count the number of differences so as to prevent double/redundant writing 6 one bit at a time, load the first desired control word bit (bit selection for eeprom is active low) 7 set the pv pin to +6v (5.6v, 6.1v) with the pulse and idle shown in timing diagram ( figure 10 ) 8 progress through all necessary control word bits by repeating steps 5 & 6 until all bits are set to the desired control word. 9 verify the correct eeprom contents by reading back the individual bits
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 7 r equest a sample m ay 2012, rev 1.2 for an example of writing bits into the eeprom, suppose the desired capacitance is 7.23pf. the control word becomes ?00000010100? ( figure 8 ). also suppose the eeprom bits have been erased and therefore logic high (the azt71 is initially shipped in this condition). since bit0 is the first bit to be loaded, the bit sequence becomes 0- 0 - 1 - 0 - 1 - 0 - 0 - 0 - 0 - 0 - 0. however, as described before, selecting bits for the eeprom are active low, which will invert the logical values in the sequence to 1 - 1 - 0 - 1 - 0 - 1 - 1 - 1- 1 - 1 - 1 ( figure 9 ). note the differences between the eeprom bits and the converted control word. since there are 2 differences, two write cycles are required as only 1 bit should be written at a time. figure 10 shows the timing for bit2 while figure 11 shows the timing for bit4. bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 figure 8 ? desired control word bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 da eeprom difference difference figure 9 ? converted control word and differences from known eeprom state s t da clk bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 0 loaded 1 st bit 10 loaded last pv 4s min 10ms min 5.6v, 6.1v figure 10 ? first programming cycle to program bit2 into the eeprom
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 8 r equest a sample m ay 2012, rev 1.2 t da clk bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 0 loaded 1 st bit 10 loaded last pv 4s min 10ms min 5.6v , 6. 1v figure 11 ? second programming cycle to program bit4 into the eeprom r eading b ack from the eeprom during programming, the pv pin is used to program the necessary control bits into the eeprom. however, it is also used to read the bits currently programmed into the eeprom. when the pv pin is not used during programming, the azt71 provides a weak pull - up and pul l - down on the pin. this allows the eeprom data to be shifted out to the pv pin and read after the clk sequence is complete and when the da & clk pins are high ( figure 12 ). each eeprom bit is selected by setting the da signal low (eeprom selection is active low) during the clk sequence. with an external 68k? resistor pull - up to v dd on the pv pin, a low eeprom bit produces 0.4v level while a high eeprom bit produces a 0.6*v dd level. t da clk bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit0 loaded 1 st bit10 loaded last pv 0.6*v dd bit5 selected resulting voltage if bit5 was high in eeprom resulting voltage if bit5 was low in eeprom 0.4v indeterminate with an external 68k? resistor pull-up to v dd figure 12 ? timing diagram to read bits from eeprom
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 9 r equest a sample m ay 2012, rev 1.2 e rasing the eeprom the eeprom can be erased by initiating a programming cycle with all da bits set high, including bit9 and bit10. after the programming cycle, all the eeprom bits are set low (logical high) except for the check bit (bit0), which remains high. table 7 ? erase sequence for eeprom step action 1 set the v dd supply voltage to +5.0v 2 load the programming word bits all high. 3 set the pv pin to +6v (5.6v, 6.1v) with the pulse and idle shown in timing diagram ( figure 13 ) 4 verify the correct eeprom contents by reading back the individual bits t da clk bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit0 loaded 1 st bit10 loaded last pv 4s min 10ms min eeprom has been erased (no capacitors selected) 5.6v, 6.1v figure 13 ? programming sequence for erasing the eeprom p rogramming v oltage l imit c ircuit some existing programming circuits use a current source connected to a 6.5 ? 8.0 v supply. that circuit produces an excessive voltage on the pv pin, which can damage the azt71. a simple modification eliminates the issue a nd maintains full programming compatibility with existing programming methods. a 5.6 v, ? watt zener, 1n5232b or equivalent, placed between the pv pin and ground will limit the voltage while still allowing the programming circuit to generate the current re quired for programming fuse link type parts.
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 10 r equest a sample m ay 2012, rev 1.2 p erformance data table 8 ? absolute maximum ratings absolute maximum ratings are those values beyond which device life may be impaired. symbol characteristic rating unit v dd power supply 0 to +6.5 v v i 1 input voltage - 0.5 to v dd + 0.5 v t a operating temperature range - 40 to +85 c t stg storage temperature range - 65 to +150 c esd hbm human body model tbd v esd mm machine model tbd v esd cdm charged device model tbd v 1 pv pin can exceed v dd by 1.2v during the programming interval table 9 ? dc characteristics dc characteristics (v dd = 2.375v to 3.6 v unless otherwise specified, t a = - 40 to 85 c) symbol characteristic conditions min typ max unit c pv nominal capacitance variation across process - 15 +15 % c vv capacitance variation across output voltage voltage variation at x 1 pin, 100mhz 150 ppm/v c tv capacitance variation across temperature 100mhz - zero code 325 ppm/ c 100mhz - mid code 1 40 100mhz - full scale 130 v ih input high voltage da, clk 0.8 * v dd v v il input low voltage da, clk 0.2 * v dd v r pd,d pull - down resistor da 75k ? r pd,clk pull - down resistor clk 75k ? r pd,pv pull - down resistor pv 170k ? v oh output high voltage pv pin when reading eeprom bits 68k ? external pull - up resistor to v dd 0.6 * v dd v v ol output low voltage 0.4 v v pp programming voltage (v dd =5.0v) pv pin when programming eeprom 5.6 6.0 6.1 v i dd power supply current normal operation 7.0 50 a i ddprog power supply current programming mode 20 a t mem eeprom data retention 20 yrs t prog programming temperature 25 c cy prog programming cycle 10 k 1 bit4, bit7 high
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 11 r equest a sample m ay 2012, rev 1.2 table 10 ? ac characteristics ac characteristics (v dd = 2.375v to 3.6 v unless otherwise specified, t a = - 40 to 85 c) symbol characteristic conditions min typ max unit c f fixed capacitance 6.6 pf c hi step size 6.4 pf max value 19.2 pf c mid step size 1.4 pf max value 9.8 pf c lo step size 0.063 pf max value 1.953 pf clk max clk rate 50% duty cycle 5 mhz t prog programming time (v dd =5.0v, pv=6.0v) per bit programmed 10 ms q q value 20mhz - full scale 150 300 20mhz - mid scale 100 200 80mhz - full scale 40 80 80mhz - mid scale 40 80 155mhz - full scale 25 50 155mhz - mid scale 25 50
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 12 r equest a sample m ay 2012, rev 1.2 p ackage d iagram son 8 (1.5x1.0 x0.4 mm) green/rohs compliant/pb - free msl=1
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 13 r equest a sample m ay 2012, rev 1.2 p ackage d iagram tsot6 green/rohs compliant/pb - free msl=1
arizona microtek, inc. azt71 programmable capacitive tuning ic www.azmicrotek.com +1 - 480- 962- 5881 14 r equest a sample m ay 2012, rev 1.2 p ackage d iagram mlp6 (2.0mm x 2.0mm) green/rohs compliant/pb - free msl=1 arizona microtek, inc. reserves the right to change circuitry and specifications at any time without prior notice. arizona microtek, inc. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does arizona microtek, inc. assume any liability arising out of the application or use of any product or circuit and specifically disc laims any and all liability, including without limitation special, consequential or incidental damages. arizona microtek, inc. does not convey any license rights nor the rights of others. arizona microtek, inc. products are not designed, intended or auth orized for use as components in systems intended to support or sustain life, or for any other application in which the failure of the arizona microtek, inc. product could create a situation where personal injury or death may occur. should buyer purchase o r use arizona microtek, inc. products for any such unintended or unauthorized application, buyer shall indemnify and hold arizona microtek, inc. and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, dam ages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that arizona microtek, inc. was negligent regardi ng the design or manufacture of the part.

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